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KAUST Accelerated Connected Computing Lab
Repositories of the KAUST Accelerated Connected Computing Lab
The Accelerated Connected Computing Lab (ACCL) at KAUST, led by Prof. Suhaib Fahmy, works at the intersection of hardware acceleration and connected computing, looking at how innovation there can make systems more efficient, performant and secure. FPGAs are our main platform for exploring the interplay between connectivity and custom hardware, programmable accelerators, SmartNICs, and GPUs.
This organisation hosts the open-source code and research artifacts behind our work.
fRAC: clients invoke FPGA-hosted accelerators directly over the network with no host CPU involved. Multi-tenant, FaaS-style acceleration at 100 Gbps with 8 µs end-to-end latency on Alveo U280.
Artifact for the ACM ATC '26 paper fRAC: Remote Accelerator Calls on FPGAs. Request-level, in-network invocation of FPGA accelerators at 100G, with runtime accelerator swapping via partial reconfiguration. Docs · Zenodo
Open-source, parametrisable systolic arrays for OCP Microscaling (MX) minifloats (MXFP8/MXFP6) on FPGAs, with exact and BF16 accumulation modes for GEMM workloads.
Massively parallel pseudo-random number generation (XORWOW, XOROSHIRO, SFMT) and distribution approximation on AI Engines, as a co-processor or within a dataflow overlay. CGRA4HPC @ IPDPS '25